我在用XILINX ISE 9.1没锁定引脚前可以通过但有WARMING,  锁定引脚后在综合VHDL代码时出现下面错误:还望高人指点啊!

Mapping a total of 82 equations into 8 function blocks......................WARNING:Cpld:896 - Unable to map all desired signals into function block, FB3,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB3,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB3,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB3,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB5,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB5,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB7,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB7,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB7,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB7,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB7,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB7,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB8,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB8,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB8,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB8,
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB8,

................................................................................................................................................................................................................................................................ERROR:Cpld:892 - Cannot place signal CD6<7>_BUFR. Consider reducing the
ERROR:Cpld:868 - Cannot fit the design into any of the specified devices with

小弟谢过大虾们了!!!